org 0x0

start:
    ; subb A,Rn
	mov psw,#0x80
	mov r0,#0x3
	mov A,#0x74
	subb A,R0
	mov 0x40,A
	mov 0x41,psw
	
	;subb A,direct
	mov PSW,#0x80
	MOV 0x20,#0x34
	mov A,#0x12
	subb a,0x20
	mov 0x42,A
	mov 0x43,PSW
	
	;subb A,#data
	mov psw,#0x80
	mov A,#0x56
	subb a,#0x65
	mov 0x44,a
	mov 0x45,psw
	
	;subb A,@Ri
	mov psw,#0x80
	mov A,#0x56
	mov 0x20,#0x13
	mov r0,#0x20
	subb a,@r0
	mov 0x46,a
	mov 0x47,psw
	
	mov psw,#0x80
	mov A,#0x56
	mov 0x21,#0x18
	mov r0,#0x21
	subb a,@r1
	mov 0x48,a
	mov 0x49,psw
	
	sjmp $
;for test
REG_SP     EQU 0x1000
REG_A      EQU 0x1001
REG_B      EQU 0x1002
REG_PSW    EQU 0x1003
REG_PC     EQU 0x1004
REG_DPTR   EQU 0x1005
CYCLE      EQU 0x1006
REG_R0     EQU 0x2000
REG_R1     EQU 0x2001
REG_R2     EQU 0x2002
REG_R3     EQU 0x2003
REG_R4     EQU 0x2004
REG_R5     EQU 0x2005
REG_R6     EQU 0x2006
REG_R7     EQU 0x2007
REG_END    EQU 0x2FFF
	org 0x600
	dw 0x40, 0x70
	dw 0x41, 0x01
	dw 0x42, 0xdd
	dw 0x43, 0xc0
	dw 0x44, 0xf0
	dw 0x45, 0x80
	dw 0x46, 0x42
	dw 0x47, 0x00
	dw 0x48, 0x34
	dw 0x49, 0x01
	dw REG_SP,    0x7
	dw REG_A,     0x34
	dw REG_B,     0x0
	dw REG_PC,    0x48
	dw REG_DPTR,  0x0
	dw CYCLE,     46
	dw REG_R0,    0x21
	dw REG_R1,    0x0
	dw REG_R2,    0x0
	dw REG_R3,    0x0
	dw REG_R4,    0x0
	dw REG_R5,    0x0
	dw REG_R6,    0x0
	dw REG_R7,    0x0
	dw REG_END
end
	